1. 25 Sep, 2020 2 commits
  2. 24 Sep, 2020 1 commit
  3. 23 Sep, 2020 2 commits
  4. 21 Sep, 2020 2 commits
    • Niels Möller's avatar
      ppc: Add configure test and macros to replace register names. · 2e6c93ca
      Niels Möller authored
      * aclocal.m4 (GMP_ASM_POWERPC_R_REGISTERS): New configure test,
      adapted from corresponding test in GMP's acinlude.m4.
      * configure.ac (ASM_PPC_WANT_R_REGISTERS): New substituted
      variable. Set using GMP_ASM_POWERPC_R_REGISTERS, when powerpc64
      assembly code is enabled.
      * config.m4.in: Substituted here.
      * powerpc64/machine.m4: Check ASM_PPC_WANT_R_REGISTERS, and
      if needed, replace register names like r0, r1, ... with integers.
      * Makefile.in (%.asm): Include m4-utils.m4 for preprocessing of .asm
      files, and include config.m4 before machine.m4.
      2e6c93ca
    • Niels Möller's avatar
      M4 utilities, from GMP. · dc89647b
      Niels Möller authored
      * m4-utils.m4: New file with m4 utilities, copied from GMP's
      mpn/asm-defs.m4.
      * Makefile.in (DISTFILES): Add m4-utils.m4.
      dc89647b
  5. 15 Sep, 2020 2 commits
  6. 14 Sep, 2020 4 commits
  7. 13 Sep, 2020 1 commit
  8. 12 Sep, 2020 2 commits
  9. 04 Sep, 2020 1 commit
    • Maamoun TK's avatar
      "PowerPC64" AES improve syntax · 3c3879ae
      Maamoun TK authored
      This patch adds "VSR" macro to improve the syntax of assembly code, I will
      create a separate patch for gcm-hash since it hasn't merged yet to the
      master. I also removed the TODO from README because I tried to use
      "lxv/stxv" in POWER9 instead of  "lxvd2x/stxvd2x" but gcc produced
      "lxvd2x/stxvd2x" in the binary. I'm not sure if it's variant issue of gcc
      but this will be problematic since "lxvd2x/stxvd2x" need  permuting in
      little-endian mode while "lxv/stxv" is endianness aware.
      3c3879ae
  10. 29 Aug, 2020 3 commits
  11. 26 Aug, 2020 12 commits
  12. 31 Jul, 2020 2 commits
  13. 20 Jul, 2020 2 commits
  14. 14 Jul, 2020 4 commits