- 17 Feb, 2021 1 commit
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Niels Möller authored
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- 15 Feb, 2021 1 commit
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Niels Möller authored
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- 13 Feb, 2021 2 commits
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Niels Möller authored
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Niels Möller authored
* configure.ac: Bump package version, to 3.7.1. (LIBNETTLE_MINOR): Bump minor number, to 8.2. (LIBHOGWEED_MINOR): Bump minor number, to 6.2.
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- 10 Feb, 2021 2 commits
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Niels Möller authored
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Niels Möller authored
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- 08 Feb, 2021 2 commits
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Niels Möller authored
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Niels Möller authored
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- 01 Feb, 2021 3 commits
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Nicolas Mora authored
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Nicolas Mora authored
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Nicolas Mora authored
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- 25 Jan, 2021 2 commits
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Niels Möller authored
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Niels Möller authored
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- 20 Jan, 2021 3 commits
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Niels Möller authored
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Niels Möller authored
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Niels Möller authored
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- 13 Jan, 2021 1 commit
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Michael Weiser authored
Switch arm neon assembler routines to endianness-agnostic loads and stores where possible to avoid modifications to the rest of the code. This involves switching to vld1.32 for loading consecutive 32-bit words in host endianness as well as vst1.8 for storing back to memory in little-endian order as required by the caller. Where necessary, r3 is used to store the precalculated offset into the source vector for the secondary load operations. vstm is kept for little-endian platforms because it is faster than vst1 on most ARM implementations. vst1.x (at least on the Allwinner A20 Cortex-A7 implementation) seems to interfer with itself on subsequent calls, slowing it down further. So we reschedule some instructions to do stores as soon as results become available to have some other calculations or loads before the next vst1.x. This reliably saves two additional cycles per block on salsa20 and chacha which would otherwise be incurred. vld1.x does not seem to suffer from this or at least not to a level where two consecutive vld1.x run slower than an equivalent vldm. Rescheduling them similarly did not improve performance beyond that of vldm. Signed-off-by:
Michael Weiser <michael.weiser@gmx.de>
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- 10 Jan, 2021 1 commit
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Niels Möller authored
* fat-ppc.c: Don't use __GLIBC_PREREQ in the same preprocessor conditional as defined(__GLIBC_PREREQ), but move to a nested #if conditional. Fixes compile error on OpenBSD/powerpc64, reported by Jasper Lievisse Adriaanse.
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- 04 Jan, 2021 1 commit
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Niels Möller authored
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- 01 Jan, 2021 1 commit
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Niels Möller authored
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- 28 Dec, 2020 2 commits
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Niels Möller authored
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Niels Möller authored
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- 27 Dec, 2020 1 commit
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Niels Möller authored
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- 26 Dec, 2020 4 commits
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Niels Möller authored
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Niels Möller authored
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Niels Möller authored
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Niels Möller authored
* configure.ac: Bump package version, to 3.7. (LIBNETTLE_MINOR): Bump minor number, to 8.1. (LIBHOGWEED_MINOR): Bump minor number, to 6.1.
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- 21 Dec, 2020 4 commits
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Niels Möller authored
Spotted by Michael Weiser
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Niels Möller authored
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Niels Möller authored
[PowerPC64] Skip using getauxval() when it is not available See merge request !16
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Maamoun TK authored
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- 20 Dec, 2020 1 commit
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Maamoun TK authored
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- 19 Dec, 2020 1 commit
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Niels Möller authored
[PowerPC64] Use 32-bit offset to load data See merge request !14
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- 18 Dec, 2020 1 commit
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mamonet authored
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- 12 Dec, 2020 1 commit
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Niels Möller authored
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- 08 Dec, 2020 1 commit
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Niels Möller authored
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- 01 Dec, 2020 3 commits
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Niels Möller authored
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Niels Möller authored
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Niels Möller authored
* powerpc64/p7/chacha-4core.asm (QR): Instruction level interleaving in the main loop, written by Torbjörn Granlund.
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- 30 Nov, 2020 1 commit
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Niels Möller authored
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