From 0d92e458cfe92bdba77a64bd97a1fe84e2f93846 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Niels=20M=C3=B6ller?= <nisse@lysator.liu.se>
Date: Mon, 31 Oct 2022 21:22:38 +0100
Subject: [PATCH] Move reciprocal and srt_reciprocal modules to arith/lib.
---
hw/Makefile | 15 +++++----------
hw/arith/.gitignore | 2 ++
hw/arith/Makefile | 3 ++-
hw/{reciprocal.vl => arith/lib/reciprocal.v} | 0
.../lib/srt_reciprocal.v} | 0
hw/{reciprocal-tb.vl => arith/reciprocal-test.v} | 2 --
.../srt_reciprocal-test.v} | 2 --
hw/cpu-all.vl | 1 -
8 files changed, 9 insertions(+), 16 deletions(-)
rename hw/{reciprocal.vl => arith/lib/reciprocal.v} (100%)
rename hw/{srt-reciprocal.vl => arith/lib/srt_reciprocal.v} (100%)
rename hw/{reciprocal-tb.vl => arith/reciprocal-test.v} (98%)
rename hw/{srt-reciprocal-tb.vl => arith/srt_reciprocal-test.v} (99%)
diff --git a/hw/Makefile b/hw/Makefile
index 89f783b..6e3b21a 100644
--- a/hw/Makefile
+++ b/hw/Makefile
@@ -7,8 +7,7 @@ TARGETS = main
all: $(TARGETS)
-TESTS = srt-reciprocal-tb reciprocal-tb \
- reg-file-tb reg-file-ice40-tb shift-unit-tb alu-unit-tb
+TESTS = reg-file-tb reg-file-ice40-tb shift-unit-tb alu-unit-tb
check: all $(TESTS)
../run-tests $(TESTS)
@@ -25,7 +24,7 @@ clean:
top-ice40-sim: top-ice40.vl cpu-all.vl reg-file-ice40.vl mem-mux.vl \
alu-unit.vl unary-unit.vl shift-unit.vl cnt-unit.vl \
mul-unit.vl reciprocal-unit.vl load-store-unit.vl \
- instr-fetch.vl instr-decode.vl srt-reciprocal.vl \
+ instr-fetch.vl instr-decode.vl \
cpu.vl top-ice40-sim.vl \
ram-unit.vl avr109rx.vl avr109tx.vl tty-ice40.vl
@@ -42,7 +41,7 @@ random-bram.hex:
top-ice40.json: top-ice40.vl cpu-all.vl reg-file-ice40.vl mem-mux.vl \
alu-unit.vl unary-unit.vl shift-unit.vl cnt-unit.vl \
mul-unit.vl reciprocal-unit.vl load-store-unit.vl \
- instr-fetch.vl instr-decode.vl srt-reciprocal.vl \
+ instr-fetch.vl instr-decode.vl \
cpu.vl \
ram-unit.vl avr109rx.vl avr109tx.vl tty-ice40.vl random-bram.hex
yosys -q -p 'hierarchy -libdir arith/lib ; synth_ice40 -json top-ice40.json' \
@@ -67,8 +66,7 @@ logic-analyzer-example.asc: logic-analyzer-example.json txd.pcf
nextpnr-ice40 --hx8k --package ct256 \
--json $< --pcf txd.pcf --asc $@
-stats: srt-reciprocal.stats \
- instr-fetch.stats instr-decode.stats \
+stats: instr-fetch.stats instr-decode.stats \
reg-file.stats reg-file-ice40.stats \
cnt-unit.stats alu-unit.stats mem-mux.stats \
unary-unit.stats shift-unit.stats mul-unit.stats \
@@ -78,16 +76,13 @@ stats: srt-reciprocal.stats \
%.stats: instr-defines.vl %.vl
$(YOSYS_STATS) $^ -L $@
-srt-reciprocal.stats: srt-reciprocal.vl
mul-unit.stats: STATS_FLAGS = -top mul_unit
-reciprocal-unit.stats: srt-reciprocal.vl reciprocal.vl
-
tty-ice40.stats: avr109rx.vl avr109tx.vl
cpu.stats: cpu-all.vl reg-file-ice40.vl mem-mux.vl \
alu-unit.vl unary-unit.vl shift-unit.vl cnt-unit.vl \
mul-unit.vl reciprocal-unit.vl load-store-unit.vl \
- instr-fetch.vl instr-decode.vl srt-reciprocal.vl \
+ instr-fetch.vl instr-decode.vl \
cpu.vl ram-unit.vl
$(YOSYS_STATS) $< > $@T && mv $@T $@
diff --git a/hw/arith/.gitignore b/hw/arith/.gitignore
index 31b6ba2..ae69e14 100644
--- a/hw/arith/.gitignore
+++ b/hw/arith/.gitignore
@@ -17,4 +17,6 @@
/popc-test
/umul4-test
/umul8-test
+/reciprocal-test
+/srt_reciprocal-test
/dadda-tree
diff --git a/hw/arith/Makefile b/hw/arith/Makefile
index b810b9a..59b76dd 100644
--- a/hw/arith/Makefile
+++ b/hw/arith/Makefile
@@ -9,7 +9,8 @@ TESTS = add_ha-test add_fa-test add_bk4-test add_bk8-test add_bk8s-test \
add_h64-test add_bk16-test carry_only-test \
umul4-test umul8-test ctz-test popc-test genmask-test \
mul3_stage-test mul4_stage-test mul6_stage-test \
- mul_3w64-test mul_4w64-test mul_6w64-test
+ mul_3w64-test mul_4w64-test mul_6w64-test \
+ reciprocal-test srt_reciprocal-test
all: $(TARGETS)
diff --git a/hw/reciprocal.vl b/hw/arith/lib/reciprocal.v
similarity index 100%
rename from hw/reciprocal.vl
rename to hw/arith/lib/reciprocal.v
diff --git a/hw/srt-reciprocal.vl b/hw/arith/lib/srt_reciprocal.v
similarity index 100%
rename from hw/srt-reciprocal.vl
rename to hw/arith/lib/srt_reciprocal.v
diff --git a/hw/reciprocal-tb.vl b/hw/arith/reciprocal-test.v
similarity index 98%
rename from hw/reciprocal-tb.vl
rename to hw/arith/reciprocal-test.v
index b95b681..43a28c6 100644
--- a/hw/reciprocal-tb.vl
+++ b/hw/arith/reciprocal-test.v
@@ -14,8 +14,6 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-`include "reciprocal.vl"
-
module main;
reg [63:0] d;
wire [63:0] v;
diff --git a/hw/srt-reciprocal-tb.vl b/hw/arith/srt_reciprocal-test.v
similarity index 99%
rename from hw/srt-reciprocal-tb.vl
rename to hw/arith/srt_reciprocal-test.v
index b3a2d95..28c57ad 100644
--- a/hw/srt-reciprocal-tb.vl
+++ b/hw/arith/srt_reciprocal-test.v
@@ -14,8 +14,6 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-`include "srt-reciprocal.vl"
-
module main;
parameter n = 64;
diff --git a/hw/cpu-all.vl b/hw/cpu-all.vl
index 543f42e..a6a30b4 100644
--- a/hw/cpu-all.vl
+++ b/hw/cpu-all.vl
@@ -30,5 +30,4 @@
`include "load-store-unit.vl"
`include "instr-decode.vl"
`include "instr-fetch.vl"
-`include "srt-reciprocal.vl"
`include "cpu.vl"
--
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