Commit 6ee4fbb5 authored by Niels Möller's avatar Niels Möller
Browse files

Document verilog tools in the README.

parent 478b135b
......@@ -79,6 +79,14 @@ putd-test.s converts the integer in r0 to ASCII using the base in r1.
./simulator/instr16 examples/putd-test.o 17 17
=> 10
To try out the verilog implementation, first install Icarus verilog,
for simulation. To synthesize for ice40, these tools are needed (in
suggested install order):
Happy hacking,
Niels Möller, <>
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